7th Workshop on the Theory of Transactional Memory
WTTM 2015

July 20, 2015, Donostia-San Sebastián, Spain - in conjunction with PODC 2015

The 7th Workshop on the Theory of Transactional Memory (WTTM) is a forum to foster exchanges, discussions, and disseminations among researchers on theoretical challenges and recent achievements in the context of concurrent computing, with an emphasis on transactional memory. Transactional Memory (TM) aims at making parallel programming more programmer friendly by providing an alternative synchronization mechanism to traditional lock-based concurrency. TM research has led to hardware TM implementations on both commodity and high performance computing microprocessors, as well as to TM integration in mainstream programming languages (like C, C++) and in the world's leading open source compiler.

From a theoretical perspective, the TM abstraction raises several challenges in the way we view synchronization as well as in the way we implement it. A major goal of the workshop is to explore new directions and approaches for reasoning about transactional memory.

Topics of interest include, but are not limited to:

Registration

In order to attend WTTM it is necessary to register via the PODC website:
http://www.podc.org/podc2015/registration
Early registration deadline is on June 22nd.

Invited Speakers

   
Yehuda Afek Tel-Aviv University, Israel
Anne-Marie Kermarrek INRIA Rennes, France
Petr Kutnzesov INFRES, Telecom ParisTech, France
Erez Petrank Technion, Israel

Program Committee

   
Hagit Attiya Technion, Israel
Panagiota Fatourou (PC Co-Chair) Univ. Crete & FORTH, Greece
Vincent Gramoli NICTA & University of Sydney, Australia
Rachid Guerraoui EPFL, Switzerland
Tim Harris Oracle, UK
Maurice Herlihy Brown University, USA
Maged Michael IBM Watson Research Center, US
Alessia Milani LABRI & Universite Bordeaux 1, France
Paolo Romano (PC Co-Chair) INESC-ID, Portugal
Eric Ruppert York University, Canada
Nir Shavit MIT, USA

Program

Time Authors Paper
09h00-09h05Opening
09h00-09h50Petr KuznetsovKeynote:
Transactional Support for SDN Control Planes
ppt
09h50-10h10Pierangelo Di Sanzo, Marco Sannicandro, Bruno Ciciani and Francesco Quaglia.On Exploring Markov Chains for Scheduling Optimization in Transactional Memorypdf ppt
10h10-10h40Coffee break
10h40-11h30Yehuda AfekKeynote:
Software/Hardware Lock elision: Amalgamated Lock-Elision
abstract
11h30-11h50David Dice, Victor Luchangco and John Rose.Accelerating Native Calls using Transactional Memorypdf
11h50-12h10William Hasenplaugh, Andrew Nguyen and Nir Shavit. Quantifying the Capacity Limitations of Hardware Transactional Memorypdf ppt
12h10-12h30Lois Orosa Nogueira and Rodolfo Azevedo. LogSI-HTM: Log Based Snapshot Isolation in Hardware Transactional Memorypdf ppt
12h30-14h30Lunch break
14h30-15h20Erez PetrankKeynote:
Practical and Theoretical News for Wait-Freedom
abstract
15h20-15h40Jingna Zeng, Paolo Romano, Luís Rodrigues, Seif Haridi, João Bareto.In Search of Semantic Models for Reconciling Futures and Transactional Memorypdf ppt
15h40-16h00Thomas Carle, Dimitra Papagiannopoulou, Iris Bahar, Tali Moreshet and Maurice Herlihy.A transaction-friendly dynamic memory manager for embedded multicore systemspdf ppt
16h00-16h30Coffee break
16h30-17h20Anne-Marie KermarrecKeynote:
TM recommenders
pdf
17h20-17h40Ahmed Hassan, Sebastiano Peluso, Roberto Palmieri and Binoy Ravindran. On the Correctness of Optimistic Composable Data Structurespdf ppt
17h40-17h45Closing